The present invention relates to semiconductors and, and more specifically, to forming semiconductor wafers having deep trenches.
Semiconductor wafers may include a base substrate layer covered by one or more layers (upper layers) formed on top of the base substrate. It may be required, in some instances, to etch the substrate after the other layers have been deposited over it. To that end, a trench is formed through the upper layers to expose the substrate layer. In some instances, a liner material is deposited on the sides of the trench before the substrate is etched.
In some cases, the substrate may be etched by a plasma etching process. The etching plasma components and sputtered material erode may the liner. This may be noticed particularly at the bottom of trench where the BOX-Si interface structure may be undercut leading to structural damage causing leakage and yield issues. This is inherent in the available plasma etch tools. Indeed, dielectric chambers are limited to fluorocarbon chemistry due to chamber materials and to provide anisotropy during silicon oxide etch. One solution is to apply a thicker liner material. The thicker liner material may reduce the width of the hole and, therefore, increase size.